H5TQ2G43EFR-xxC
Description
The H5TQ2G43EFR-xx C, H5TQ2G83EFR-xx C are a 2Gb CMOS Double Data Rate III (DDR3) Synchronous DRAM, ideally suited for the main memory applications which requires large memory density and high bandwidth. SK hynix 2Gb DDR3 SDRAMs offer fully synchronous operations referenced to both rising and falling edges of the clock. While all addresses and control inputs are latched on the rising edges of the CK (falling edges of the CK), Data, Data strobes and Write data masks inputs are sampled on both rising and falling edges of it. The data paths are internally pipelined and 8-bit prefetched to achieve very high bandwidth.
Device Features and Ordering Information
FEATURES
- VDD=VDDQ=1.5V +/- 0.075V
- Fully differential clock inputs (CK, CK) operation
- 8banks
- Average Refresh Cycle (Tcase of 0 o C~ 95 o C)
- Differential Data Strobe (DQS, DQS)
- 7.8 µs at 0o C ~ 85 o C
- 3.9 µs at 85o C ~ 95 o C
- On chip DLL align DQ, DQS and DQS transition with CK transition
- JEDEC standard 78ball...
